Datasheet

Timer Interface Module (TIM)
Technical Data MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
178 Timer Interface Module (TIM) Freescale Semiconductor
11.2 Introduction
This section describes the timer interface module (TIM2, Version B). The
TIM is a 2-channel timer that provides a timing reference with input
capture, output compare, and pulse-width-modulation functions.
Figure 11-1 is a block diagram of the TIM.
11.3 Features
Features of the TIM include:
• Two input capture/output compare channels
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
• Buffered and unbuffered pulse width modulation (PWM) signal
generation
• Programmable TIM clock input
– 7-frequency internal bus clock prescaler selection
– External TIM clock input (bus frequency ÷2 maximum)
• Free-running or modulo up-count operation
• Toggle any channel pin on overflow
• TIM counter stop and reset bits
11.4 Pin Name Conventions
The TIM share three I/O pins with three port E I/O pins. The full name of
the TIM I/O pin is listed in Table 11-1. The generic pin name appear in
the text that follows.
Table 11-1. TIM Pin Name Conventions
TIM Generic Pin Names: TCLK TCH0 TCH1
Full TIM Pin Names: PTE0/TCLK
PTE1/TCH0
PTE2/TCH1