Datasheet

Input/Output Ports (I/O)
Introduction
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3 Technical Data
Freescale Semiconductor Input/Output Ports (I/O) 201
$0009 Data Direction Register E
(DDRE)
Read: 0 0 0
DDRE4 DDRE3 DDRE2 DDRE1 DDRE0
Write:
Reset:00000000
$001D
Port Option Control
Register
(POCR)
Read:
PTE20P PTDLDD PTDILDD PTE4P PTE3P PCP PBP PAP
Write:
Reset:00000000
Table 12-1. Port Control Register Bits Summary
Port Bit DDR
Module Control
Pin
Module Register Control Bit
A
0 DDRA0
KBI KBIER ($0017)
KBIE0 PTA0/KBA0
1 DDRA1 KBIE1 PTA1/KBA1
2 DDRA2 KBIE2 PTA2/KBA2
3 DDRA3 KBIE3 PTA3/KBA3
4 DDRA4 KBIE4 PTA4/KBA4
5 DDRA5 KBIE5 PTA5/KBA5
6 DDRA6 KBIE6 PTA6/KBA6
7 DDRA7 KBIE7 PTA7/KBA7
B 0–7 DDRB[0:7] — — — PTB0–PTB7
C 0–7 DDRC[0:7] — — — PTC0–PTC7
D 0–7 DDRD[0:7] — — — PTD0–PTD7
E
0 DDRE0
TIM
TSC ($000A) PS[2:0] PTE0/TCLK
1 DDRE1 TSC0 ($0010) ELS0B:ELS0A PTE1/TCH0
2 DDRE2 TSC1 ($0013) ELS1B:ELS1A PTE2/TCH1
3 DDRE3
USB UADDR ($0038) USBEN
PTE3/D+
4 DDRE4 PTE4/D–
Addr.Register Name Bit 7654321Bit 0
= Unimplemented
Figure 12-1. I/O Port Register Summary