Datasheet

Input/Output Ports (I/O)
Technical Data MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
212 Input/Output Ports (I/O) Freescale Semiconductor
Figure 12-13. Port D I/O Circuit
When bit DDRDx is a logic 1, reading address $0003 reads the PTDx
data latch. When bit DDRDx is a logic 0, reading address $0003 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 12-5 summarizes
the operation of the port D pins.
12.7 Port E
Port E is a 5-bit special function port that shares three of its pins with the
timer interface module (TIM) and two of its pins with the USB data pins
D+ and D–. PTE4 and PTE3 are open drain when configured as output.
Table 12-5. Port D Pin Functions
DDRD
Bit
PTD Bit I/O Pin Mode
Accesses
to DDRD
Accesses to PTD
Read/Write Read Write
0
X
(1)
NOTES:
1. X = don’t care.
Input, Hi-Z
(2)
2. Hi-Z = high impedance.
DDRD[7:0] Pin
PTD[7:0]
(3)
3. Writing affects data register, but does not affect input.
1 X Output DDRD[7:0] PTD[7:0] PTD[7:0]
READ DDRD ($0007)
WRITE DDRD ($0007)
RESET
WRITE PTD ($0003)
READ PTD ($0003)
PTDx
DDRDx
PTDx
INTERNAL DATA BUS