Datasheet

Computer Operating Properly (COP)
Technical Data MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
240 Computer Operating Properly (COP) Freescale Semiconductor
15.4.4 Power-On Reset
The power-on reset (POR) circuit in the SIM clears the COP prescaler
4096 OSCXCLK cycles after power-up.
15.4.5 Internal Reset
An internal reset clears the SIM counter and the COP counter.
15.4.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
15.4.7 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register (CONFIG).
15.4.8 COPRS (COP Rate Select)
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register (CONFIG).
Address: $001F
Bit 7654321Bit 0
Read: 0 0
URSTD LVID SSREC COPRS STOP COPD
Write:
Reset:00000000
= Unimplemented
Figure 15-2. Configuration Register (CONFIG)