Datasheet

MC68HC08JT8
Technical Data MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
284 MC68HC08JT8 Freescale Semiconductor
B.11.4 Control Timing
B.11.5 Memory Characteristics
B.12 MC68HC08JT8 Order Numbers
These part numbers are generic numbers only. To place an order, ROM
code must be submitted to the ROM Processing Center (RPC).
NOTES:
1. V
DD
= 2.0 to 3.6 Vdc, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, unless otherwise noted.
2. Typical values reflect average measurements at 3V, 25 °C only.
3. In LDD mode, the specified I
OL
is achieved when the external pullup voltage is equal to or higher than the voltage:
V
OL
+ voltage dropped across LED.
4. Run (operating) I
DD
measured using external square wave clock source (f
XCLK
= 6 MHz). All inputs 0.2 V from rail. No dc
loads. Less than 100 pF on all outputs. C
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
affects run I
DD
. Measured with all modules enabled.
5. Wait I
DD
measured using external square wave clock source (f
XCLK
= 6 MHz). All inputs 0.2 V from rail. No dc loads. Less
than 100 pF on all outputs. C
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait I
DD
.
6. Stop I
DD
measured with OSC1 grounded; no port pins sourcing current.
7. Maximum is highest voltage that POR is guaranteed.
Characteristic Symbol Min Max Unit
Internal operating frequency
V
DD
= 2.0V
V
DD
= 3.0V
f
OP
—
—
2.5
3.0
MHz
MHz
Characteristic Symbol Min Max Unit
RAM data retention voltage
V
RDR
1.3 — V
NOTES: Since MC68HC08JT8 is a ROM device, FLASH memory electrical characteristics do not apply.
Table B-2. MC68HC08JT8 Order Numbers
MC Order Number Package
Operating
Temperature Range
Compliance
MC68HC08JT8ADW 28-pin SOIC 0 to +70 °C
—
MC68HC08JT8FB 44-pin QFP 0 to +70 °C
MC68HC08JT8FBE 44-pin QFP 0 to +70 °C
Pb-Free and RoHS
compliant.