Datasheet

System Integration Module (SIM)
Technical Data MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
94 System Integration Module (SIM) Freescale Semiconductor
8.7 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .110
8.7.1 Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .110
8.7.2 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
8.8 SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113
8.8.1 Break Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .113
8.8.2 Reset Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . .114
8.8.3 Break Flag Control Register . . . . . . . . . . . . . . . . . . . . . . .116
8.2 Introduction
This section describes the system integration module (SIM), which
supports up to 8 external and/or internal interrupts. Together with the
CPU, the SIM controls all MCU activities. The SIM is a system state
controller that coordinates CPU and exception timing. A block diagram
of the SIM is shown in Figure 8-1. Figure 8-2 is a summary of the SIM
I/O registers. The SIM is responsible for:
• Bus clock generation and control for CPU and peripherals
– Stop/wait/reset/break entry and recovery
– Internal clock control
• Master reset control, including power-on reset (POR) and COP
timeout
• Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
• CPU enable/disable timing
• Modular architecture expandable to 128 interrupt sources