Datasheet

System Integration Module (SIM)
MC68HC908JL3E Family Data Sheet, Rev. 4
56 Freescale Semiconductor
Interrupts are latched, and arbitration is performed in the SIM at the start of interrupt processing. The
arbitration result is a constant that the CPU uses to determine which vector to fetch. Once an interrupt is
latched by the SIM, no other interrupt can take precedence, regardless of priority, until the latched
interrupt is serviced (or the I bit is cleared).
Figure 5-8. Interrupt Processing
NO
NO
NO
YES
NO
NO
YES
NO
YES
YES
(As many interrupts as exist on chip)
I BIT SET?
FROM RESET
BREAK INTERRUPT?
I BIT SET?
IRQ
INTERRUPT?
TIMER
INTERRUPT?
SWI
INSTRUCTION?
RTI
INSTRUCTION?
FETCH NEXT
INSTRUCTION
UNSTACK CPU REGISTERS.
STACK CPU REGISTERS.
SET I BIT.
LOAD PC WITH INTERRUPT VECTOR.
EXECUTE INSTRUCTION.
YES
YES