Datasheet

SIM Registers
MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor 63
Figure 5-19. Stop Mode Recovery from Interrupt or Break
5.7 SIM Registers
The SIM has three memory mapped registers. Table 5-4 shows the mapping of these registers.
5.7.1 Break Status Register (BSR)
The break status register contains a flag to indicate a break caused by an exit from wait mode.
SBSW — SIM Break Stop/Wait
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
Table 5-4. SIM Registers
Address Register Access Mode
$FE00 BSR User
$FE01 RSR User
$FE03 BFCR User
Address: $FE00
Bit 7654321Bit 0
Read:
RRRRRR
SBSW
R
Write: Note
(1)
Reset: 0
R = Reserved 1. Writing a zero clears SBSW.
Figure 5-20. Break Status Register (BSR)
2OSCOUT
INT/BREAK
IAB
STOP + 2 STOP + 2 SP SP – 1 SP – 2 SP – 3
STOP +1
STOP RECOVERY PERIOD