Datasheet

I/O Registers
MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor 91
8.9.2 TIM Counter Registers (TCNTH:TCNTL)
The two read-only TIM counter registers contain the high and low bytes of the value in the TIM counter.
Reading the high byte (TCNTH) latches the contents of the low byte (TCNTL) into a buffer. Subsequent
reads of TCNTH do not affect the latched TCNTL value until TCNTL is read. Reset clears the TIM counter
registers. Setting the TIM reset bit (TRST) also clears the TIM counter registers.
NOTE
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL by
reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
8.9.3 TIM Counter Modulo Registers (TMODH:TMODL)
The read/write TIM modulo registers contain the modulo value for the TIM counter. When the TIM counter
reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow
interrupts until the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
NOTE
Reset the TIM counter before writing to the TIM counter modulo registers.
Address: $0021 TCNTH
Bit 7654321Bit 0
Read: Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8
Write:
Reset:00000000
Address: $0022 TCNTL
Bit 7654321Bit 0
Read: Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Write:
Reset:00000000
= Unimplemented
Figure 8-5. TIM Counter Registers (TCNTH:TCNTL)
Address: $0023 TMODH
Bit 7654321Bit 0
Read:
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8
Write:
Reset:11111111
Address: $0024 TMODL
Bit 7654321Bit 0
Read:
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Write:
Reset:11111111
Figure 8-6. TIM Counter Modulo Registers (TMODH:TMODL)