Datasheet

Analog-to-Digital Converter (ADC)

MC68HC908JL3E Family Data Sheet, Rev. 4

98 Freescale Semiconductor

Figure 9-2. ADC Block Diagram

9.3.1 ADC Port I/O Pins

PTB0–PTB7 and PTD0–PTD3 are general-purpose I/O pins that are shared with the ADC channels. The

channel select bits (ADC status and control register, $003C), define which ADC channel/port pin will be

used as the input signal. The ADC overrides the port I/O by forcing that pin as input to the ADC. The

remaining ADC channels/port pins are controlled by the port I/O and can be used as general-purpose I/O.

Writes to the port register or DDR will not have any affect on the port pin that is selected by the ADC. Read

of a port pin which is in use by the ADC will return a 0 if the corresponding DDR bit is at 0. If the DDR bit

is at 1, the value in the port data latch is read.

INTERNAL

DATA BUS

INTERRUPT

LOGIC

CHANNEL

SELECT

ADC

CLOCK

GENERATOR

CONVERSION

COMPLETE

ADC VOLTAGE IN

ADCVIN

ADC CLOCK

BUS CLOCK

ADCH[4:0]

ADC DATA REGISTER

ADIV[2:0] ADICLK

AIEN COCO

DISABLE

ADC CHANNEL x

READ DDRB/DDRD

WRITE DDRB/DDRD

RESET

WRITE PTB/PTD

READ PTB/PTD

DDRBx/DDRDx

PTBx/PTDx

(1 OF 12 CHANNELS)

ADCx