Datasheet

MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor 103
Chapter 10
Input/Output (I/O) Ports
10.1 Introduction
Twenty three (23) bidirectional input-output (I/O) pins form three parallel ports. All I/O pins are
programmable as inputs or outputs.
NOTE
Connect any unused I/O pins to an appropriate logic level, either V
DD
or V
SS
.
Although the I/O ports do not require termination for proper operation,
termination reduces excess current consumption and the possibility of
electrostatic damage.
20-pin devices have non-bonded pins. These pins should be configured
either as outputs driving low or high, or as inputs with internal pullups
enabled. Configuring these non-bonded pins in this manner will prrevent
any excess current compsumption caused by floating inputs.
Addr.Register Name Bit 7654321Bit 0
$0000
Port A Data Register
(PTA)
Read: 0
PTA6 PTA5 PTA4 PTA3 PTA2 PTA1 PTA0
Write:
Reset: Unaffected by reset
$0001
Port B Data Register
(PTB)
Read:
PTB7 PTB6 PTB5 PTB4 PTB3 PTB2 PTB1 PTB0
Write:
Reset: Unaffected by reset
$0003
Port D Data Register
(PTD)
Read:
PTD7 PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0
Write:
Reset: Unaffected by reset
$0004
Data Direction Register A
(DDRA)
Read: 0
DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
Write:
Reset:00000000
$0005
Data Direction Register B
(DDRB)
Read:
DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0
Write:
Reset:00000000
$0007
Data Direction Register D
(DDRD)
Read:
DDRD7 DDRD6 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1 DDRD0
Write:
Reset:00000000
Figure 10-1. I/O Port Register Summary