Datasheet

Flash Block Protect Register
MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor 33
2.12 Flash Block Protect Register
The Flash Block Protect Register is implemented as an 8-bit I/O register. The value in this register
determines the starting address of the protected range within the Flash memory.
BPR[7:0] — Flash Block Protect Register Bit 7 to Bit 0
BPR[7:1] represent bits [12:6] of a 16-bit memory address. Bits [15:13] are 1’s and bits [5:0] are 0’s.
BPR0 is used only for BPR[7:0] = $FF, for no block protection.
The resultant 16-bit address is used for specifying the start address of the Flash memory for block
protection. The Flash is protected from this start address to the end of Flash memory, at $FFFF. With
this mechanism, the protect start address can be XX00, XX40, XX80, or XXC0 (at page boundaries —
64 bytes) within the Flash memory.
Examples of protect start address:
Address: $FE09
Bit 7654321Bit 0
Read:
BPR7 BPR6 BPR5 BPR4 BPR3 BPR2 BPR1 BPR0
Write:
Reset:00000000
Figure 2-6. Flash Block Protect Register (FLBPR)
16-bit memory address
Start address of Flash block protect 111 000000
BPR[7:1]
BPR[7:0] Start of Address of Protect Range
$00–$60 The entire Flash memory is protected.
$62 or $63
(0110 001x)
$EC40 (1110 1100 0100 0000)
$64 or $65
(0110 010x)
$EC80 (1110 1100 1000 0000)
$68 or $69
(0110 100x)
$ED00 (1110 1101 0000 0000)
and so on...
$DE or $DF
(1101 111x)
$FBC0 (1111 1011 1100 0000)
$FE
(1111 1110)
$FFC0 (1111 1111 1100 0000)
$FF The entire Flash memory is not protected.
Note:
The end address of the protected range is always $FFFF.