Datasheet

MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor 71
Chapter 7
Monitor ROM (MON)
7.1 Introduction
This section describes the monitor ROM (MON) and the monitor mode entry methods. The monitor ROM
allows complete testing of the MCU through a single-wire interface with a host computer. This mode is
also used for programming and erasing of Flash memory in the MCU. Monitor mode entry can be
achieved without use of the higher test voltage, V
TST
, as long as vector addresses $FFFE and $FFFF are
blank, thus reducing the hardware requirements for in-circuit programming.
7.2 Features
Features of the monitor ROM include the following:
• Normal user-mode pin functionality
• One pin dedicated to serial communication between monitor ROM and host computer
• Standard mark/space non-return-to-zero (NRZ) communication with host computer
• Execution of code in RAM or Flash
• Flash memory security feature
(1)
• Flash memory programming interface
• 960 bytes monitor ROM code size
• Monitor mode entry without high voltage, V
TST
, if reset vector is blank ($FFFE and $FFFF contain
$FF)
• Standard monitor mode entry if high voltage, V
TST
, is applied to IRQ
7.3 Functional Description
The monitor ROM receives and executes commands from a host computer. Figure 7-1 shows a example
circuit used to enter monitor mode and communicate with a host computer via a standard RS-232
interface.
Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
host-computer code in RAM while most MCU pins retain normal operating mode functions. All
communication between the host computer and the MCU is through the PTB0 pin. A level-shifting and
multiplexing interface is required between PTB0 and the host computer. PTB0 is used in a wired-OR
configuration and requires a pull-up resistor.
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the Flash difficult for
unauthorized users.