Datasheet

Functional Description
MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor 83
Addr. Register Name Bit 7 6 5 4 3 2 1 Bit 0
$0020
TIM Status and Control
Register (TSC)
Read: TOF
TOIE TSTOP
00
PS2 PS1 PS0
Write: 0 TRST
Reset:00100000
$0021
TIM Counter Register High
(TCNTH)
Read: Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8
Write:
Reset:00000000
$0022
TIM Counter Register Low
(TCNTL)
Read: Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Write:
Reset:00000000
$0023
TIM Counter Modulo Register
High (TMODH)
Read:
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8
Write:
Reset:11111111
$0024
TIM Counter Modulo Register
Low (TMODL)
Read:
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Write:
Reset:11111111
$0025
TIM Channel 0 Status and
Control Register (TSC0)
Read: CH0F
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
Write: 0
Reset:00000000
$0026
TIM Channel 0 Register High
(TCH0H)
Read:
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8
Write:
Reset: Indeterminate after reset
$0027
TIM Channel 0 Register Low
(TCH0L)
Read:
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Write:
Reset: Indeterminate after reset
$0028
TIM Channel 1 Status and
Control Register (TSC1)
Read: CH1F
CH1IE
0
MS1A ELS1B ELS1A TOV1 CH1MAX
Write: 0
Reset:00000000
$0029
TIM Channel 1 Register High
(TCH1H)
Read:
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8
Write:
Reset: Indeterminate after reset
$002A
TIM Channel 1 Register Low
(TCH1L)
Read:
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Write:
Reset: Indeterminate after reset
= Unimplemented
Figure 8-2. TIM I/O Register Summary