Datasheet

System Integration Module (SIM)
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
138 Freescale Semiconductor
Figure 13-2. SIM Block Diagram
Table 13-1 shows the internal signal names used in this section.
Table 13-1. Signal Name Conventions
Signal Name Description
CGMXCLK Selected clock source from internal clock generator module (ICG)
CGMOUT Clock output from ICG module (bus clock = CGMOUT divided by two)
IAB Internal address bus
IDB Internal data bus
PORRST Signal from the power-on reset (POR) module to the SIM
IRST Internal reset signal
R/W
Read/write signal
STOP/WAIT
CLOCK
CONTROL
CLOCK GENERATORS
POR CONTROL
SIM RESET STATUS REGISTER
INTERRUPT CONTROL
AND PRIORITY DECODE
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO ICG)
CGMOUT (FROM ICG)
INTERNAL CLOCKS
MASTER
RESET
CONTROL
LVI (FROM LVI MODULE)
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP (FROM COP MODULE)
INTERRUPT SOURCES
CPU INTERFACE
RESET
CONTROL
SIM
COUNTER
COP CLOCK
CGMXCLK (FROM ICG)
÷ 2
FORCED MON MODE ENTRY
(FROM MENRST MODULE)