Datasheet

MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
Freescale Semiconductor 155
Chapter 15
Timer Interface Module (TIM)
15.1 Introduction
This section describes the timer interface module (TIM). The TIM is a 2-channel timer that provides a
timing reference with input capture, output compare, and pulse-width modulation functions. Figure 15-2
is a block diagram of the TIM.
15.2 Features
Features include:
• Two input capture/output compare channels:
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
• Buffered and unbuffered pulse-width modulation (PWM) signal generation
• Programmable TIM clock input — 7-frequency internal bus clock prescaler selection
• Free-running or modulo up-counter operation
• Toggle either channel pin on overflow
• TIM counter stop and reset bits
15.3 Pin Name Conventions
The TIM shares two input/output (I/O) pins with two port A I/O pins. The full names of the TIM I/O pins are
listed in Table 15-1. The generic pin names appear in the text that follows.
15.4 Functional Description
Figure 15-2 shows the structure of the TIM. The central component of the TIM is the 16-bit TIM counter
that can operate as a free-running counter or a modulo up-counter. The TIM counter provides the timing
reference for the input capture and output compare functions. The TIM counter modulo registers, TMODH
and TMODL, control the modulo value of the TIM counter. Software can read the TIM counter value at
any time without affecting the counting sequence.
The two TIM channels are programmable independently as input capture or output compare channels.
Figure 15-3 summarizes the timer registers.
Table 15-1. Pin Name Conventions
TIM Generic Pin Names: TCH0 TCH1
Full TIM Pin Names: PTA2/KBD2/TCH0 PTA3/KBD3/TCH1