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MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
172 Freescale Semiconductor
16.2.2.2 Break Address Registers
The break address registers (BRKH and BRKL) contain the high and low bytes of the desired breakpoint
address. Reset clears the break address registers.
16.2.2.3 Break Status Register
The break status register (SBSR) contains a flag to indicate that a break caused an exit from wait mode.
The flag is useful in applications requiring a return to wait mode after exiting from a break interrupt.
BW — Break Wait Bit
This read/write bit is set when a break interrupt causes an exit from wait mode. Clear BW by writing
a 0 to it. Reset clears BW.
1 = Break interrupt during wait mode
0 = No break interrupt during wait mode
BW can be read within the break interrupt routine. The user can modify the return address on the stack
by subtracting 1 from it.
Address: $FE09
Bit 7654321Bit 0
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset:00000000
Figure 16-4. Break Address Register High (BRKH)
Address: $FE0A
Bit 7654321Bit 0
Read:
Bit 7654321Bit 0
Write:
Reset:00000000
Figure 16-5. Break Address Register Low (BRKL)
Address: $FE00
Bit 7654321Bit 0
Read:000100BW0
Write:RRRRRRNOTER
Reset:00010000
Note: Writing a 0 clears BW. R = Reserved
Figure 16-6. SIM Break Status Register (SBSR)