Datasheet

Memory
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
28 Freescale Semiconductor
$0038
ICG Trim Register
(ICGTR)
See page 89.
Read:
TRIM7 TRIM6 TRIM5 TRIM4 TRIM3 TRIM2 TRIM1 TRIM0
Write:
Reset:10000000
$0039
ICG Divider Control
Register (ICGDVR)
See page 89.
Read:
DDIV3 DDIV2 DDIV1 DDIV0
Write:
Reset:0000UUUU
$003A
ICG DCO Stage Control
Register (ICGDSR)
See page 89.
Read: DSTG7 DSTG6 DSTG5 DSTG4 DSTG3 DSTG2 DSTG1 DSTG0
Write:RRRRRRRR
Reset:UUUUUUUU
$003B Reserved RRRRRRRR
$003C
Analog-to-Digital Status and
Control Register (ADSCR)
See page 43.
Read: COCO
AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Write: R
Reset:00011111
$003D
Analog-to-Digital Data
Register (ADR)
See page 45.
Read:AD7AD6AD5AD4AD3AD2AD1AD0
Write:RRRRRRRR
Reset: Indeterminate after reset
$003E
Analog-to-Digital Input Clock
Register (ADCLK)
See page 45.
Read:
ADIV2 ADIV1 ADIV0 ADICLK
000
R
Write:
Reset:00000000
$003F Unimplemented
$FE00
SIM Break Status Register
(SBSR)
(1)
See page 172.
Read:000100BW0
Write:RRRRRRNOTER
Reset:00010000
1. Writing a 0 clears BW.
$FE01
SIM Reset Status Register
(SRSR)
See page 148.
Read: POR 0 COP ILOP ILAD MENRST LVI 0
Write:
POR:10000000
$FE02
Break Auxiliary Register
(BRKAR)
See page 173.
Read:0000000
BDCOP
Write:
Reset:00000000
$FE03
SIM Break Flag Control
Register (SBFCR)
See page 173.
Read:
BCFERRRRRRR
Write:
Reset: 0
$FE04
Interrupt Status Register 1
(INT1)
See page 149.
Read: IF6 IF5 IF4 IF3 IF2 IF1 0 0
Write:RRRRRRRR
Reset:00000000
Addr.Register Name Bit 7654321Bit 0
= Unimplemented R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 5)