Datasheet

Internal Clock Generator Module (ICG)
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 Data Sheet, Rev. 2.1
72 Freescale Semiconductor
Figure 7-3. External Clock Generator Block Diagram
The amplifier is enabled when the external clock generator enable (ECGEN) signal is set and when the
external crystal enable (EXTXTALEN) bit in the CONFIG (or MOR) register is set. ECGEN is controlled
by the clock enable circuit (see 7.3.1 Clock Enable Circuit), and indicates that the external clock function
is desired. When enabled, the amplifier will be connected between the PTB6/(OSC1) and
PTB7/(OSC2)/RST
pins. Otherwise, the PTB7/(OSC2)/RST pin reverts to its port function. In its typical
configuration, the external oscillator requires five external components:
•Crystal, X
1
• Fixed capacitor, C
1
• Tuning capacitor, C
2
(can also be a fixed capacitor)
• Feedback resistor, R
B
• Series resistor, R
S
(included in the diagram to follow strict Pierce oscillator guidelines and may not
be required for all ranges of operation, especially with high frequency crystals. Refer to the crystal
manufacturer’s data for more information.)
7.3.3.2 External Clock Input Path
The external clock input path is the means by which the microcontroller uses an external clock source.
The input to the path is the PTB6/(OSC1) pin and the output is the external clock (ECLK). The path, which
contains input buffering, is enabled when the external clock generator enable signal (ECGEN) is set.
When not enabled, the PTB6/(OSC1) pin reverts to its port function.
C
1
C
2
R
B
X
1
R
S
*
ECGEN
EXTXTALEN
ECLK
INTERNAL TO MCU
EXTERNAL
OSC1
PTB6
OSC2
PTB7
AMPLIFIER
INPUT PATH
EXTSLOW
NAME
NAME
NAME
NAME
CONFIGURATION (OR MOR) BIT
TOP LEVEL SIGNAL
REGISTER BIT
MODULE SIGNAL
EXTERNAL
CLOCK
GENERATOR
*R
S
can be 0 (shorted)
when used with higher-
frequency crystals. Refer
to manufacturer’s data.
These components are required
for external crystal use only.