Datasheet

Analog-to-Digital Converter (ADC)
I/O Registers
MC68HC908LJ24/LK24 — Rev. 2.1 Data Sheet
Freescale Semiconductor Analog-to-Digital Converter (ADC) 343
ADCO — ADC Continuous Conversion Bit
When set, the ADC will convert samples continuously and update the
ADC data register at the end of each conversion. Only one conversion
is allowed when this bit is cleared. Reset clears the ADCO bit.
1 = Continuous ADC conversion
0 = One ADC conversion
ADCH[4:0] — ADC Channel Select Bits
ADCH[4:0] form a 5-bit field which is used to select one of the ADC
channels when not in auto-scan mode. The five channel select bits
are detailed in Table 16-1.
NOTE: Care should be taken when using a port pin as both an analog and a
digital input simultaneously to prevent switching noise from corrupting
the analog signal.
Recovery from the disabled state requires one conversion cycle to
stabilize.
Table 16-1. MUX Channel Select
ADCH4 ADCH3 ADCH2 ADCH1 ADCH0 ADC Channel Input Select
00000 ADC0 PTA4
00001 ADC1 PTA5
00010 ADC2 PTA6
00011 ADC3 PTA7
00100 ADC4 PTB6
00101 ADC5 PTB7
00110 ADC61.2V Bandgap reference
00111 ADC7
V
LCD
01000 ADC8
Reserved↓↓↓↓↓ ↓
11100 ADC28
11
1 0 1 ADC29
V
REFH
(see Note 2)
11
1 1 0 ADC30
V
REFL
(see Note 2)
11
1 1 1 ADC powered-off —
NOTES:
1. If any reserved channels are selected, the resulting ADC conversion will be unknown.
2. The voltage levels supplied from internal reference nodes as specified in the table are used to verify the operation of
the ADC converter both in production test and for user applications.