Datasheet

Input/Output (I/O) Ports
Port F
MC68HC908LJ24/LK24 — Rev. 2.1 Data Sheet
Freescale Semiconductor Input/Output (I/O) Ports 399
When DDRFx is a logic 1, reading address $000A reads the PTFx data
latch. When DDRFx is a logic 0, reading address $000A reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Table 18-7 summarizes the operation of the port F pins.
18.8.3 Port F LED Control Register (LEDF)
Port-F LED control register (LEDF) controls the direct LED drive
capability on PTF7–PTF0 pins. Each bit is individually configurable and
requires that the data direction register, DDRF, bit be configured as an
output.
LEDF[7:0] — Port F LED Drive Enable Bits
These read/write bits are software programmable to enable the direct
LED drive on an output port pin.
1 = Corresponding port F pin is configured for direct LED drive,
with 15mA current sinking capability
0 = Corresponding port F pin is configured for standard drive
Table 18-7. Port F Pin Functions
DDRF
Bit
PTF Bit I/O Pin Mode
Accesses to DDRF Accesses to PTF
Read/Write Read Write
0X
(1)
Notes:
1. X = don’t care; except.
Input, Hi-Z
(2)
2. Hi-Z = high impedance.
DDRF[7:0] Pin PTF[7:0]
(3)
3. Writing affects data register, but does not affect input.
1 X Output DDRF[7:0] PTF[7:0] PTF[7:0]
Address: $000F
Bit 7654321Bit 0
Read:
LEDF7 LEDF6 LEDF5 LEDF4 LEDF3 LEDF2 LEDF1 LEDF0
Write:
Reset:00000000
Figure 18-23. Port F LED Control Register (LEDF)