Datasheet

Memory Map
Data Sheet MC68HC908LJ24/LK24 — Rev. 2.1
50 Memory Map Freescale Semiconductor
2.4 Reserved Memory Locations
Accessing a reserved location can have unpredictable effects on MCU
operation. In Figure 2-2 and in register figures in this document,
reserved locations are marked with the word Reserved or with the
letter R.
2.5 Input/Output (I/O) Section
Most of the control, status, and data registers are in the zero page
$0000–$007F. Additional I/O registers have the following addresses:
• $FE00; SIM break status register, SBSR
• $FE01; SIM reset status register, SRSR
• $FE03; SIM break flag control register, SBFCR
• $FE04; Interrupt status register 1, INT1
• $FE05; Interrupt status register 2, INT2
• $FE06; Interrupt status register 3, INT3
• $FE07; Reserved
• $FE08; FLASH control register, FLCR
• $FE09; Reserved
• $FE0A; Reserved
• $FE0B; Reserved
• $FE0C; break address register high, BRKH
• $FE0D; break address register low, BRKL
• $FE0E; break status and control register, BRKSCR
• $FE0F; LVI status register, LVISR
• $FFCF; FLASH block protect register, FLBPR (FLASH register)
• $FFFF; COP control register, COPCTL
Data registers are shown in Figure 2-2, Table 2-1 is a list of vector
locations.