Datasheet

Memory Map
Input/Output (I/O) Section
MC68HC908LJ24/LK24 — Rev. 2.1 Data Sheet
Freescale Semiconductor Memory Map 55
$001E
IRQ Status and Control
Register
(INTSCR)
Read: 0000IRQF0
IMASK MODE
Write: ACK
Reset:00000000
$001F
Configuration Register 1
(CONFIG1)
†
Read:
COPRS LVISTOP LVIRSTD LVIPWRD
0
SSREC STOP COPD
Write:
Reset:0000
††
0000
† One-time writable register after each reset.
†† Reset by POR only.
$0020
Timer 1 Status and Control
Register
(T1SC)
Read: TOF
TOIE TSTOP
00
PS2 PS1 PS0
Write: 0 TRST
Reset:00100000
$0021
Timer 1 Counter
Register High
(T1CNTH)
Read: Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset:00000000
$0022
Timer 1 Counter
Register Low
(T1CNTL)
Read: Bit 7 654321Bit 0
Write:
Reset:00000000
$0023
Timer 1 Counter Modulo
Register High
(T1MODH)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset:11111111
$0024
Timer 1 Counter Modulo
Register Low
(T1MODL)
Read:
Bit 7654321Bit 0
Write:
Reset:11111111
$0025
Timer 1 Channel 0 Status
and Control Register
(T1SC0)
Read: CH0F
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
Write: 0
Reset:00000000
$0026
Timer 1 Channel 0
Register High
(T1CH0H)
Read:
Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset:XXXXXXXX
Addr.Register Name Bit 7654321Bit 0
U = Unaffected X = Indeterminate
= Unimplemented R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 13)