Datasheet

Memory Map
Data Sheet MC68HC908LJ24/LK24 — Rev. 2.1
58 Memory Map Freescale Semiconductor
$003B
PLL Reference Divider
Select Register
(PMDS)
Read: 0000
RDS3 RDS2 RDS1 RDS0
Write:
Reset:00000001
$003C
ADC Status and Control
Register
(ADCSR)
Read: COCO
AIEN ADCO ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Write:
Reset:00011111
$003D
ADC Data Register high
(ADRH)
Read: ADx ADx ADx ADx ADx ADx ADx ADx
Write:RRRRRRRR
Reset:00000000
$003E
ADC Data Register low
(ADRL)
Read: ADx ADx ADx ADx ADx ADx ADx ADx
Write:RRRRRRRR
Reset:00000000
$003F
ADC Clock Control
Register
(ADCLK)
Read:
ADIV2 ADIV1 ADIV0 ADICLK MODE1 MODE0
00
Write:
R
Reset:00000100
$0040
RTC Calibration Control
Register
(RTCCOMR)
Read: 0 0
CAL AUTOCAL OUTF1 OUTF0
00
Write: R R RTCWE1 RTCWE0
Reset:00000010
$0041
RTC Calibration Data
Register
(RTCCDAT)
Read: EOVL 0
E5 E4 E3 E2 E1 E0
Write:
Reset:U0UUUUUU
$0042
RTC Control Register 1
(RTCCR1)
Read:
ALMIE CHRIE DAYIE HRIE MINIE SECIE TB1IE TB2IE
Write:
Reset:00000000
$0043
RTC Control Register 2
(RTCCR2)
Read:
COMEN
0
CHRE RTCE TBH
000
Write: CHRCLR
Reset: U 0 0 0
††
0000
†† Reset by POR only.
Addr.Register Name Bit 7654321Bit 0
U = Unaffected X = Indeterminate
= Unimplemented R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 13)