Datasheet

Memory Map
Input/Output (I/O) Section
MC68HC908LJ24/LK24 — Rev. 2.1 Data Sheet
Freescale Semiconductor Memory Map 65
.
Table 2-1. Vector Addresses
Priority INT Flag Address Vector
Lowest
IF18
$FFD8
Real Time Clock
$FFD9
IF17
$FFDA
ADC Conversion Complete
$FFDB
IF16
$FFDC
Keyboard
$FFDD
IF15
$FFDE
MMIIC
$FFDF
IF14
$FFE0
SCI Transmit
$FFE1
IF13
$FFE2
SCI Receive
$FFE3
IF12
$FFE4
SCI Error
$FFE5
IF11
$FFE6
SPI Receive
$FFE7
IF10
$FFE8
SPI Transmit
$FFE9
IF9
$FFEA
TIM2 Overflow
$FFEB
IF8
$FFEC
TIM2 Channel 1
$FFED
IF7
$FFEE
TIM2 Channel 0
$FFEF
IF6
$FFF0
TIM1 Overflow
$FFF1
IF5
$FFF2
TIM1 Channel 1
$FFF3
IF4
$FFF4
TIM1 Channel 0
$FFF5
IF3
$FFF6
PLL
$FFF7
IF2
$FFF8
LVI
$FFF9
IF1
$FFFA IRQ
Vector (High)
$FFFB IRQ
Vector (Low)
—
$FFFC SWI Vector (High)
$FFFD SWI Vector (Low)
—
$FFFE Reset Vector (High)
Highest $FFFF Reset Vector (Low)