Datasheet

Electrical Specifications
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
170 Freescale Semiconductor
16.15 Memory Characteristics
Characteristic Symbol Min Typ Max Unit
RAM data retention voltage
(1)
1. Values are based on characterization results, not tested in production.
V
RDR
1.3 — — V
FLASH program bus clock frequency — 1 — — MHz
FLASH PGM/ERASE supply voltage (V
DD
)V
PGM/ERASE
2.7 — 5.5 V
FLASH read bus clock frequency
f
Read
(2)
2. f
Read
is defined as the frequency range for which the FLASH memory can be read.
0—8 MHz
FLASH page erase time
<1 K cycles
>1 K cycles
t
Erase
0.9
3.6
1
4
1.1
5.5
ms
FLASH mass erase time
t
MErase
4——ms
FLASH PGM/ERASE to HVEN setup time
t
NVS
10 — — μs
FLASH high-voltage hold time
t
NVH
5——μs
FLASH high-voltage hold time (mass erase)
t
NVHL
100 — — μs
FLASH program hold time
t
PGS
5——μs
FLASH program time
t
PROG
30 — 40 μs
FLASH return to read time
t
RCV
(3)
3. t
RCV
is defined as the time it needs before the FLASH can be read after turning off the high voltage charge pump, by clear-
ing HVEN to 0.
1——μs
FLASH cumulative program hv period
t
HV
(4)
4. t
HV
is defined as the cumulative high voltage programming time to the same row before next erase.
t
HV
must satisfy this condition: t
NVS
+ t
NVH
+ t
PGS
+ (t
PROG
x 32) ≤ t
HV
maximum.
—— 4ms
FLASH endurance
(5)
5. Typical endurance was evaluated for this product family. For additional information on how Freescale Semiconductor
defines Typical Endurance, please refer to Engineering Bulletin EB619.
— 10 k 100 k — Cycles
FLASH data retention time
(6)
6. Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated
to 25•C using the Arrhenius equation. For additional information on how Freescale Semiconductor defines Typical Data
Retention, please refer to Engineering Bulletin EB618.
— 15 100 — Years