Datasheet

Memory
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
24 Freescale Semiconductor
$001D
IRQ Status and Control
Register (INTSCR)
See page 81.
Read: 0 0 0 0 IRQF 0
IMASK MODE
Write:
ACK
Reset:00000000
$001E
Configuration Register 2
(CONFIG2)
(1)
See page 57.
Read:
IRQPUD IRQEN R R R R
OSCENIN-
STOP
RSTEN
Write:
Reset:00000000
(2)
1. One-time writable register after each reset.
2. RSTEN reset to 0 by a power-on reset (POR) only.
$001F
Configuration Register 1
(CONFIG1)
(1)
See page 58.
Read:
COPRS LVISTOP LVIRSTD LVIPWRD LVITRIP SSREC STOP COPD
Write:
Reset:00000
(2)
000
1. One-time writable register after each reset.
2. LVITRIP reset to 0 by a power-on reset (POR) only.
$0020
TIM Status and Control
Register (TSC)
See page 132.
Read: TOF
TOIE TSTOP
00
PS2 PS1 PS0
Write: 0 TRST
Reset:00100000
$0021
TIM Counter Register High
(TCNTH)
See page 134.
Read: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset:00000000
$0022
TIM Counter Register Low
(TCNTL)
See page 134.
Read: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset:00000000
$0023
TIM Counter Modulo
Register High (TMODH)
See page 134.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset:11111111
$0024
TIM Counter Modulo
Register Low (TMODL)
See page 134.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset:11111111
$0025
TIM Channel 0 Status and
Control Register (TSC0)
See page 135.
Read: CH0F
CH0IE MS0B MS0A ELS0B ELS0A TOV0 CH0MAX
Write: 0
Reset:00000000
$0026
TIM Channel 0
Register High (TCH0H)
See page 137.
Read:
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Write:
Reset: Indeterminate after reset
$0027
TIM Channel 0
Register Low (TCH0L)
See page 137.
Read:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Write:
Reset: Indeterminate after reset
Addr.Register Name Bit 7654321Bit 0
= Unimplemented R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 5)