Datasheet

Electrical Specifications
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
160 Freescale Semiconductor
16.8 3-V DC Electrical Characteristics
Characteristic
(1)
1. V
DD
= 2.7 to 3.3 Vdc, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, unless otherwise noted.
Symbol Min
Typ
(2)
2. Typical values reflect average measurements at midpoint of voltage range, 25•C only.
Max Unit
Output high voltage
I
Load
= –0.6 mA, all I/O pins
I
Load
= –4.0 mA, all I/O pins
I
Load
= –10.0 mA, PTA0, PTA1, PTA3–PTA5 only
V
OH
V
DD
–0.3
V
DD
–1.0
V
DD
–0.8
V
Maximum combined I
OH
(all I/O pins) I
OHT
——50mA
Output low voltage
I
Load
= 0.5 mA, all I/O pins
I
Load
= 6.0 mA, all I/O pins
I
Load
= 10.0 mA, PTA0, PTA1, PTA3–PTA5 only
V
OL
0.3
1.0
0.8
V
Maximum combined I
OL
(all I/O pins) I
OHL
——50mA
Input high voltage
PTA0–PTA5, PTB0–PTB7
V
IH
0.7 x V
DD
V
DD
V
Input low voltage
PTA0–PTA5, PTB0–PTB7
V
IL
V
SS
0.3 x V
DD
V
Input hysteresis
(3)
3. Values are based on characterization results, not tested in production.
V
HYS
0.06 x V
DD
—— V
DC injection current, all ports
(4)
4. Guaranteed by design, not tested in production.
I
INJ
–2 +2 mA
Total dc current injection (sum of all I/O)
(4)
I
INJTOT
–25 +25 mA
Ports Hi-Z leakage current
I
IL
–1 ±0.1 +1 μA
Capacitance
Ports (as input)
(3)
C
IN
——8pF
POR rearm voltage
V
POR
750 mV
POR rise time ramp rate
(3)(5)
5. If minimum V
DD
is not reached before the internal POR reset is released, the LVI will hold the part in reset until minimum
V
DD
is reached.
R
POR
0.035 V/ms
Monitor mode entry voltage
(3)
V
TST
V
DD
+ 2.5
V
DD
+ 4.0
V
Pullup resistors
(6)
PTA0–PTA5, PTB0–PTB7
6. R
PU
is measured at
V
DD
= 3.0 V
R
PU
16 26 36 kΩ
Pulldown resistors
(7)
PTA0–PTA5
7. R
PD
is measured at
V
DD
= 3.0 V, Pulldown resistors only available when KBIx is enabled with KBIxPOL =1.
R
PD
16 26 36 kΩ
Low-voltage inhibit reset, trip falling voltage
V
TRIPF
2.40 2.55 2.70 V
Low-voltage inhibit reset, trip rising voltage
(6)
V
TRIPR
2.475 2.625 2.775 V
Low-voltage inhibit reset/recover hysteresis
V
HYS
—75mV