Datasheet

EEPROM Memory
EEPROM Control Registers
MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor EEPROM Memory 109
EEDIV[9:0] — Prescaler divider
Loaded from SHADOW word at reset.
Read anytime. Write once in normal modes (SMODN =1) if EELAT =
0 and anytime in special modes (SMODN =0) if EELAT = 0.
The prescaler divider is required to produce a self-time clock with a
fixed frequency around 28.6 Khz for the range of oscillator
frequencies. The divider is set so that the oscillator frequency can be
divided by a divide factor that can produce a 35 µs +/- 2µs pulse.
CAUTION: An incorrect or uninitialized value on EEDIV can result in overstress of
EEPROM array during program/erase operation. It is also strongly
recommend not to program EEPROM with oscillator frequencies less
than 250 Khz.
The EEDIV value is determined by the following formula:
NOTE: INT[A] denotes the round down integer value of A. Program/erase cycles
will not be activated when EEDIV = 0.
EEDIV INT EXTALi (hz) x 35
6–
×10 0.5+[]=
Table 8-1. EEDIV Selection
Osc Freq. Osc Period Divide Factor EEDIV
16 Mhz 62.5ns 560 $0230
8 Mhz 125ns 280 $0118
4 Mhz 250ns 140 $008C
2 Mhz 500ns 70 $0046
1 Mhz 1µs 35 $0023
500 Khz 2µs 18 $0012
250 Khz 4µs 9 $0009