Datasheet

MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor Clock Functions 137
Technical Data — MC68HC912D60A
Section 11. Clock Functions
11.1 Contents
11.2 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137
11.3 Clock Sources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .138
11.4 Phase-Locked Loop (PLL) . . . . . . . . . . . . . . . . . . . . . . . . . . .139
11.5 Acquisition and Tracking Modes. . . . . . . . . . . . . . . . . . . . . . .141
11.6 Limp-Home and Fast STOP Recovery modes . . . . . . . . . . . .143
11.7 System Clock Frequency formulas. . . . . . . . . . . . . . . . . . . . .162
11.8 Clock Divider Chains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .162
11.9 Computer Operating Properly (COP) . . . . . . . . . . . . . . . . . . .166
11.10 Real-Time Interrupt. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .167
11.11 Clock Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .167
11.12 Clock Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . .168
11.2 Introduction
Clock generation circuitry generates the internal and external ECLK
signals as well as internal clock signals used by the CPU and on-chip
peripherals. A clock monitor circuit, a computer operating properly
(COP) watchdog circuit, and a periodic interrupt circuit are also
incorporated into the MC68HC912D60A.