Datasheet

Clock Functions
Limp-Home and Fast STOP Recovery modes
MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor Clock Functions 149
Figure 11-5. STOP Exit and Fast STOP Recovery
11.6.4 STOP exit without Limp Home mode, clock monitor disabled
(NOLHM=1, CME=0, DLY=X)
If Limp home mode is disabled (V
DDPLL
=V
SS
or NOLHM bit set) and the
CME (or FCME) bit is cleared, the MCU goes into STOP mode when a
STOP instruction is executed.
If EXTALi clock is present then exit from STOP will occur normally using
this clock. Under this condition, DLY should always be set to allow the
crystal to stabilise and minimise the risk of code runaway. With DLY=1
execution resumes after a delay of 4096 XCLK cycles.
NOTE: The external clock signal should stabilise within the 4096 reset counter
cycles. Use of DLY=0 is not recommended due to this requirement.
Clock Monitor Fail
EXTALi
13-stage counter
0 --> 4096
Limp-Home
(Clocked by XCLK)
BCSP Restore BCSP
SYSCLK PLLCLK (L.H.) Restore PLLCLK or EXTALi
STOP (DLY = 1)
STOP (DLY = 0)