Datasheet

Pulse Width Modulator
Technical Data MC68HC912D60A — Rev. 3.1
208 Pulse Width Modulator Freescale Semiconductor
possible to know where the count is with respect to the duty value and
software can be used to make adjustments by turning the enable bit off
and on.
The four PWM channel outputs share general-purpose port P pins.
Enabling PWM pins takes precedence over the general-purpose port.
When PWM channels are not in use, the port pins may be used for
discrete input/output.
Figure 13-1. Block Diagram of PWM Left-Aligned Output Channel
GATE
PWCNTx
8-BIT COMPARE =
PWDTYx
8-BIT COMPARE =
PWPERx
UP
/DOWN
FROM PORT P
DATA REGISTER
TO PIN
DRIVER
PPOLx
CLOCK SOURCE
(ECLK or Scaled ECLK)
(CLOCK EDGE SYNC) RESET
CENTR = 0
MUX
MUX
S
R
Q
Q
PWPER
PWDTY
PWENx
PPOL = 0
PPOL = 1
SYNC