Datasheet

Pulse Width Modulator
Technical Data MC68HC912D60A — Rev. 3.1
210 Pulse Width Modulator Freescale Semiconductor
Figure 13-3. PWM Clock Sources
13.3 PWM Register Description
Read and write anytime.
8-BIT DOWN COUNTER
PCLK2
MUX
PCLK3
MUX
CLOCK TO PWM
CHANNEL 2
CLOCK TO PWM
CHANNEL 3
÷ 2
PWSCNT1
8-BIT SCALE REGISTER
PWSCAL1
CLOCK B
CLOCK S1**
**CLOCK S1 = B/2 * (PWSCAL1 + 1)
÷ 2
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
8-BIT DOWN COUNTER
PCLK0
MUX
PCLK1
MUX
CLOCK TO PWM
CHANNEL 0
CLOCK TO PWM
CHANNEL 1
÷ 2
PWSCNT0
8-BIT SCALE REGISTER
PWSCAL0
CLOCK A
CLOCK S0*
*CLOCK S0 = A/2 * (PWSCAL0 + 1)
REGISTER: BITS:
PCKB2,
PCKB0
PCKB1,
= 0
= 0
BITS:
PCKA2,
PCKA0
PCKA1,
PWPRES
PSBCK
LIMBDM
ECLK
PSBCK IS BIT 0 OF PWCTL REGISTER.
INTERNAL SIGNAL LIMBDM IS ‘1’ IF THE MCU IS IN BACKGROUND DEBUG MODE.
Bit 7654321Bit 0
CON23 CON01 PCKA2 PCKA1 PCKA0 PCKB2 PCKB1 PCKB0
RESET: 00000000
PWCLK — PWM Clocks and Concatenate $0040