Datasheet

Pulse Width Modulator
Technical Data MC68HC912D60A — Rev. 3.1
218 Pulse Width Modulator Freescale Semiconductor
Read and write anytime.
The value in the period register determines the period of the associated
PWM channel. If written while the channel is enabled, the new value will
not take effect until the existing period terminates, forcing the counter to
reset. The new period is then latched and is used until a new period
value is written. Reading this register returns the most recent value
written. To start a new period immediately, write the new period value
and then write the counter forcing a new period to start with the new
period value.
Period = Channel-Clock-Period × (PWPER + 1) (CENTR = 0)
Period = Channel-Clock-Period × (2 × PWPER) (CENTR = 1)
Read and write anytime.
Bit 7654321Bit 0
PWPER0 Bit 7654321Bit 0$004C
PWPER1 Bit 7654321Bit 0$004D
PWPER2 Bit 7654321Bit 0$004E
PWPER3 Bit 7654321Bit 0$004F
RESET: 1 1 1 1 1 1 1 1
PWPERx — PWM Channel Period Registers
Bit 7654321Bit 0
PWDTY0 Bit 7654321Bit 0$0050
PWDTY1 Bit 7654321Bit 0$0051
PWDTY2 Bit 7654321Bit 0$0052
PWDTY3 Bit 7654321Bit 0$0053
RESET: 1 1 1 1 1 1 1 1
PWDTYx — PWM Channel Duty Registers