Datasheet

General Description
Features
MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor General Description 25
• Analog-to-digital converters
– 2 x 8-channels, 10-bit resolution in 112TQFP
– 1 x 8-channels, 8-bit resolution in 80QFP
• 1M bit per second, CAN 2.0 A, B software compatible module
– Two receive and three transmit buffers
– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or
8x8bit
– Four separate interrupt channels for Rx, Tx, error and wake-up
– Low-pass filter wake-up function
– In 80QFP, only TxCAN and RxCAN pins are available
– Loop-back for self test operation
– Programmable link to a timer input capture channel, for time-
stamping and network synchronization.
• Enhanced capture timer (ECT)
– 16-bit main counter with 7-bit prescaler
– 8 programmable input capture or output compare channels; 4
of the 8 input captures with buffer
– Input capture filters and buffers, three successive captures on
four channels, or two captures on four channels with a
capture/compare selectable on the remaining four
– Four 8-bit or two 16-bit pulse accumulators
– 16-bit modulus down-counter with 4-bit prescaler
– Four user-selectable delay counters for signal filtering
• 4 PWM channels with programmable period and duty cycle
– 8-bit 4-channel or 16-bit 2-channel
– Separate control for each pulse width and duty cycle
– Center- or left-aligned outputs
– Programmable clock select logic with a wide range of
frequencies