Datasheet

Enhanced Capture Timer
Technical Data MC68HC912D60A — Rev. 3.1
260 Enhanced Capture Timer Freescale Semiconductor
Read: any time
Write: has no effect.
These registers are used to latch the value of the input capture registers
TC0 – TC3. The corresponding IOSx bits in TIOS ($80) should be
cleared (see IC Channels).
Bit 7654321Bit 0
Bit 15 14 13 12 11 10 9 Bit 8
Bit 7654321Bit 0
TC0H — Timer Input Capture Holding Register 0 $00B8–$00B9
Bit 7654321Bit 0
Bit 15 14 13 12 11 10 9 Bit 8
Bit 7654321Bit 0
TC1H — Timer Input Capture Holding Register 1 $00BA–$00BB
Bit 7654321Bit 0
Bit 15 14 13 12 11 10 9 Bit 8
Bit 7654321Bit 0
TC2H — Timer Input Capture Holding Register 2 $00BC–$00BD
Bit 7654321Bit 0
Bit 15 14 13 12 11 10 9 Bit 8
Bit 7654321Bit 0
TC3H — Timer Input Capture Holding Register 3 $00BE–$00BF