Datasheet

Multiple Serial Interface
Serial Communication Interface (SCI)
MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor Multiple Serial Interface 265
Figure 15-2. Serial Communications Interface Block Diagram
Rx Baud Rate
Tx Baud Rate
MCLK
DIVIDER
10-11 Bit SHIFT REG
MSB
TxD BUFFER/SCxDRL
TxMTR CONTROL
SCxCR2/SCI CTL 2
SCxCR1/SCI CTL 1
SCxSR1/INT STATUS
DATA RECOVERY
10-11 BIT SHIFT REG
TxD BUFFER/SCxDRL
SCxBD/SELECT
LSB
RxD
TxD
PIN CONTROL / DDRS / PORT S
WAKE-UP LOGIC
SCxCR1/SCI CTL 1
SCxSR1/INT STATUS
SCxCR2/SCI CTL 2
INT REQUEST LOGIC
MSB LSB
INT REQUEST LOGIC
SCI RECEIVER
SCI TRANSMITTER
BAUD RATE
CLOCK
TO
INTERNAL
LOGIC
DATA BUS
PARITY
DETECT
PARITY
GENERATOR