Datasheet

Multiple Serial Interface
Serial Communication Interface (SCI)
MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor Multiple Serial Interface 267
15.4.3 SCI Register Descriptions
Control and data registers for the SCI subsystem are described below.
The memory address indicated for each register is the default address
that is in use after reset. Both SCI have identical control registers
mapped in two blocks of eight bytes.
SCxBDH and SCxBDL are considered together as a 16-bit baud rate
control register.
Read any time. Write SBR[12:0] anytime. Low order byte must be written
for change to take effect. Write SBR[15:13] only in special modes. The
value in SBR[12:0] determines the baud rate of the SCI. The desired
baud rate is determined by the following formula:
which is equivalent to:
BR is the value written to bits SBR[12:0] to establish baud rate.
NOTE: The baud rate generator is disabled until TE or RE bit in SCxCR2
register is set for the first time after reset, and/or the baud rate generator
is disabled when SBR[12:0] = 0.
Bit 7654321Bit 0
BTST BSPL BRLD SBR12 SBR11 SBR10 SBR9 SBR8 High
RESET: 00000000
SC0BDH/SC1BDH — SCI Baud Rate Control Register $00C0/$00C8
Bit 7654321Bit 0
SBR7 SBR6 SBR5 SBR4 SBR3 SBR2 SBR1 SBR0 Low
RESET: 00000100
SC0BDL/SC1BDL — SCI Baud Rate Control Register $00C1/$00C9
SCI Baud Rate
MCLK
16 BR×
--------------------=
BR
MCLK
16 SCI Baud Rate×
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