Datasheet

MSCAN Controller
Interrupts
MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor MSCAN Controller 315
17.6.1 Interrupt Acknowledge
Interrupts are directly associated with one or more status flags in either
the msCAN12 receiver flag register (CRFLG) or the msCAN12
transmitter flag register (CTFLG). Interrupts are pending as long as one
of the corresponding flags is set. The flags in above registers must be
reset within the interrupt handler in order to handshake the interrupt. The
flags are reset through writing a 1 to the corresponding bit position. A flag
cannot be cleared if the respective condition still prevails.
NOTE: Bit manipulation instructions (BSET) shall not be used to clear interrupt
flags.
17.6.2 Interrupt Vectors
The msCAN12 supports four interrupt vectors as shown in Table 17-1.
The vector addresses and the relative interrupt priority are dependent on
the chip integration and to be defined.
Table 17-1. msCAN12 Interrupt Vectors
Function Source Local Mask Global Mask
Wake-Up WUPIF WUPIE
I Bit
Error
Interrupts
RWRNIF RWRNIE
TWRNIF TWRNIE
RERRIF RERRIE
TERRIF TERRIE
BOFFIF BOFFIE
OVRIF OVRIE
Receive RXF RXFIE
Trans mi t
TXE0 TXEIE0
TXE1 TXEIE1
TXE2 TXEIE2