Datasheet

Analog-to-Digital Converter
ATD Registers
MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor Analog-to-Digital Converter 375
Resetting to idle mode defines the only exception of the reset control
bit condition to the system reset condition. The reset control bit does
not initialize the ADPU bit to its reset condition and therefore does not
power down the module. This except allows the module to remain
active for other test operations.
18.9.7 PORTAD Port Data Register
The input data port associated with the ATD module is input-only. The
port pins are shared with the analog A/D inputs.
PADx[7:0] — Port AD Data Input Bits
Reset: These pins reflect the state of the input pins.
The ATD input ports may be used for general purpose digital input.
When the port data registers are read, they contain the digital levels
appearing on the input pins at the time of the read. Input pins with signal
potentials not meeting V IL or V IH specifications will have an
indeterminate value.
Use of any Port pin for digital input does not preclude the use of any
other Port pin for analog input.
Writes to this register have no meaning at any time.
PORTAD0/PORTAD1 — Port AD Data Input Register $006F/$01EF
Bit 7654321Bit 0
PADx7 PADx6 PADx5 PADx4 PADx3 PADx2 PADx1 PADx0
RESET: - - ------