Datasheet

Electrical Specifications
Technical Data MC68HC912D60A — Rev. 3.1
410 Electrical Specifications Freescale Semiconductor
Table 20-6. Analog Converter Characteristics (Operating)
V
DD
= 5.0 Vdc ±10%, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, ATD Clock = 2 MHz, unless otherwise noted
Characteristic Symbol Min Typical Max Unit
8-bit resolution
(1)
1 count 20 mV
8-bit absolute error
,(2)
2, 4, 8, and 16 ATD sample clocks
AE −1 +1 count
10-bit resolution
(1)
1 count 5 mV
10-bit absolute error
(2)
2, 4, 8, and 16 ATD sample clocks
AE –2.5 2.5 count
1. At V
RH
– V
RL
= 5.12V, one 8-bit count = 20 mV, and one 10-bit count = 5mV.
2. These values include quantization error which is inherently 1/2 count for any A/D converter.
Absolute errors only guaranteed when V
RL
=V
SS
, V
RH
=V
DD
and when external source impedence is close to zero.
Table 20-7. ATD AC Characteristics (Operating)
V
DD
= 5.0 Vdc ±10%, V
SS
= 0 Vdc, T
A
= T
L
to T
H
, ATD Clock = 2 MHz, unless otherwise noted
Characteristic Symbol Min Max Unit
MCU clock frequency (p-clock)
f
PCLK
2.0 8.0 MHz
ATD operating clock frequency
f
ATDCLK
0.5 2.0 MHz
ATD 8-Bit conversion period
clock cycles
(1)
conversion time
(2)
n
CONV8
t
CONV8
18
9
32
16
cycles
µs
ATD 10-Bit conversion period
clock cycles
(1)
conversion time
(2)
n
CONV10
t
CONV10
20
10
34
17
cycles
µs
Stop and ATD power up recovery time
(3)
VDDA = 5.0V
t
SR
10 µs
1. The minimum time assumes a final sample period of 2 ATD clock cycles while the maximum time assumes a final sample
period of 16ATD clocks.
2. This assumes an ATD clock frequency of 2.0MHz.
3. From the time ADPU is asserted until the time an ATD conversion can begin.