Datasheet

Pinout and Signal Descriptions
Technical Data MC68HC912D60A — Rev. 3.1
44 Pinout and Signal Descriptions Freescale Semiconductor
3.5 Signal Descriptions
3.5.1 Crystal Driver and External Clock Input (XTAL, EXTAL)
These pins provide the interface for either a crystal or a CMOS
compatible clock to control the internal clock generator circuitry. Out of
reset the frequency applied to EXTAL is twice the desired E–clock rate.
All the device clocks are derived from the EXTAL input frequency.
3.5.1.1 Crystal Connections
Refer to Section 12. Oscillator for details of crystal connections.
Table 3-1. MC68HC912D60A Power and Ground Connection Summary
Mnemonic
Pin Number
Description
80-pin
QFP
112-pin
QFP
V
DD
9, 49 12, 65
Internal power and ground.
V
SS
10, 50 14, 66
V
DDX
30, 75 42, 107
External power and ground, supply to pin drivers.
V
SSX
29, 74 40, 106
V
DDA
61 85
Operating voltage and ground for the analog-to-digital
converter, allows the supply voltage to the A/D to be
bypassed independently.
V
SSA
62 88
V
RH1
—86
Reference voltages for the analog-to-digital converter 1
V
RL1
—87
V
RH0
51 67
Reference voltages for the analog-to-digital converter 0.
V
RL0
52 68
V
DDPLL
31 43
Provides operating voltage and ground for the Phased-Locked
Loop. This allows the supply voltage to the PLL to be
bypassed independently.
V
SSPLL
33 45