Datasheet

MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor Registers 61
Technical Data — MC68HC912D60A
Section 4. Registers
4.1 Contents
4.2 Register Block. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
4.2 Register Block
The register block can be mapped to any 2K byte boundary within the
standard 64K byte address space by manipulating bits REG[15:11] in
the INITRG register. INITRG establishes the upper five bits of the
register block’s 16-bit address. The register block occupies the first 512
bytes of the 2K byte block. Default addressing (after reset) is indicated
in Table 4-1. For additional information refer to Operating Modes and
Resource Mapping.