Datasheet

Operating Modes and Resource Mapping
Technical Data MC68HC912D60A — Rev. 3.1
78 Operating Modes and Resource Mapping Freescale Semiconductor
data. It is made of the 28K byte FEE28 array mapped from $1000 to
$7FFF at reset and of the 32 K byte FEE32 array mapped from $8000 to
$FFFF at reset. MAPROM bit in the MISC register allows the swapping
of the two flash arrays.
5.5.1 Register Block Mapping
After reset the 512 byte register block resides at location $0000 but can
be reassigned to any 2K byte boundary within the standard 64K byte
address space. Mapping of internal registers is controlled by five bits in
the INITRG register. The register block occupies the first 512 bytes of the
2K byte block.
REG[15:11] — Internal register map position
These bits specify the upper five bits of the 16-bit registers address.
Normal modes: write once; special modes: write anytime. Read
anytime.
Table 5-2. Mapping Precedence
Precedence Resource
1 BDM ROM (if active)
2 Register Space
3RAM
4 EEPROM
5 On-Chip Flash EEPROM (MC68HC912D60A)
6 External Memory
Bit 7654321Bit 0
REG15 REG14 REG13 REG12 REG11 0 0 MMSWAI
RESET: 0 0 0 0 0 0 0 0
INITRG — Initialization of Internal Register Position Register $0011