Datasheet

Bus Control and Input/Output
Technical Data MC68HC912D60A — Rev. 3.1
88 Bus Control and Input/Output Freescale Semiconductor
Bits PB[7:0] are associated with addresses ADDR[7:0] and DATA[7:0]
(except in narrow mode) respectively. When this port is not used for
external addresses such as in single-chip mode, these pins can be used
as general-purpose I/O. DDRB determines the primary direction of each
pin. This register is not in the on-chip map in expanded and peripheral
modes. Read and write anytime.
This register determines the primary direction for each port B pin when
functioning as a general-purpose I/O port. DDRB is not in the on-chip
map in expanded and peripheral modes. Read and write anytime.
0 = Associated pin is a high-impedance input
1 = Associated pin is an output
Bit 76 5 4 3 2 1Bit 0
Single Chip PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
RESET: — — — — — — — —
Expanded
& Periph:
ADDR7/
DATA7
ADDR6/
DATA6
ADDR5/
DATA5
ADDR4/
DATA4
ADDR3/
DATA3
ADDR2/
DATA2
ADDR1/
DATA1
ADDR0/
DATA0
Expanded
narrow
ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0
PORTB — Port B Register $0001
Bit 7654321Bit 0
DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0
RESET: 00000000
DDRB — Port B Data Direction Register $0003