Datasheet

Bus Control and Input/Output
Registers
MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor Bus Control and Input/Output 89
This register is associated with external bus control signals and interrupt
inputs, including data bus enable (DBE), mode select (MODB/IPIPE1,
MODA/IPIPE0), ECLK, size (LSTRB), read/write (R/W), IRQ, and XIRQ.
When the associated pin is not used for one of these specific functions,
the pin can be used as general-purpose I/O. The port E assignment
register (PEAR) selects the function of each pin. DDRE determines the
primary direction of each port E pin when configured to be general-
purpose I/O.
Some of these pins have software selectable pull-ups (DBE, LSTRB,
R/W, IRQ, and XIRQ). A single control bit enables the pull-ups for all
these pins which are configured as inputs.
This register is not in the map in peripheral mode or expanded modes
when the EME bit is set.
Read and write anytime.
This register determines the primary direction for each port E pin
configured as general-purpose I/O.
BIT 7654321BIT 0
PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
RESET: — — — — — — — —
Alt. Pin
Function
DBE
or
ECLK
or
CAL
MODB or
IPIPE1 or
CGMTST
MODA or
IPIPE0
ECLK
LSTRB
or
BDTAGL or
TAGLO
R/W IRQ XIRQ
PORTE — Port E Register $0008
Bit 7654321Bit 0
DDE7 DDE6 DDE5 DDE4 DDE3 DDE2 0 0
RESET:00000000
DDRE — Port E Data Direction Register $0009