Datasheet

Flash Memory
Flash EEPROM Registers
MC68HC912D60A — Rev. 3.1 Technical Data
Freescale Semiconductor Flash Memory 99
7.6 Flash EEPROM Registers
In normal modes the LOCK bit can only be written once after reset.
LOCK — Lock Register Bit
0 = Enable write to FEEMCR register
1 = Disable write to FEEMCR register
This register controls the operation of the Flash EEPROM array. BOOTP
cannot be changed when the LOCK control bit in the FEELCK register is
set or if HVEN or PGM or ERAS in the FEECTL register is set .
BOOTP — Boot Protect
The boot blocks are located at $6000–$7FFF and $E000–$FFFF for
each Flash EEPROM module.
0 = Enable erase and program of 8K byte boot block
1 = Disable erase and program of 8K byte boot block
This register controls the programming and erasure of the Flash
EEPROM.
FEE32LCK/FEE28LCK — Flash EEPROM Lock Control Register $00F4/$00F8
Bit 7 6 5 4 3 2 1 Bit 0
0 0 0 0 0 0 0 LOCK
RESET: 0 0 0 0 0 0 0 0
FEE32MCR/FEE28MCR — Flash EEPROM Module Configuration Register $00F5/$00F9
Bit 7 6 5 4 3 2 1 Bit 0
0 0 0 0 0 0 0 BOOTP
RESET: 0 0 0 0 0 0 0 1
FEE32CTL/FEE28CTL — Flash EEPROM Control Register $00F7/$00FB
Bit 7 6 5 4 3 2 1 Bit 0
0 0 0 FEESWAI HVEN 0 ERAS PGM
RESET: 0 0 0 0 0 0 0 0