Datasheet

Bus Control and Input/Output
Technical Data MC68HC912DT128A — Rev 4.0
106 Bus Control and Input/Output MOTOROLA
Bits PB[7:0] are associated with addresses ADDR[7:0] and DATA[7:0]
(except in narrow mode) respectively. When this port is not used for
external addresses such as in single-chip mode, these pins can be
used as general-purpose I/O. DDRB determines the primary direction
of each pin. This register is not in the on-chip map in expanded and
peripheral modes. Read and write anytime.
This register determines the primary direction for each port B pin
when functioning as a general-purpose I/O port. DDRB is not in the
on-chip map in expanded and peripheral modes. Read and write
anytime.
0 = Associated pin is a high-impedance input
1 = Associated pin is an output
This register is associated with external bus control signals and
interrupt inputs, including data bus enable (DBE
), mode select
(MODB/IPIPE1, MODA/IPIPE0), E clock, size (LSTRB), read/write
PORTB — Port B Register $0001
Bit 7654321Bit 0
Single Chip PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
RESET: — — — — — — — —
Expanded
& Periph:
ADDR7/
DATA7
ADDR6/
DATA6
ADDR5/
DATA5
ADDR4/
DATA4
ADDR3/
DATA3
ADDR2/
DATA2
ADDR1/
DATA1
ADDR0/
DATA0
Expanded
narrow
ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0
DDRB — Port B Data Direction Register $0003
Bit 7654321Bit 0
DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0
RESET: 00000000
PORTE — Port E Register $0008
BIT 7654321BIT 0
PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
RESET: ————————
Alt. Pin
Function
DBE
or
ECLK
or
CAL
MODB or
IPIPE1 or
CGMTST
MODA or
IPIPE0
ECLK
LSTRB
or
TAGLO
R/W IRQ XIRQ
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...