Datasheet

Bus Control and Input/Output
Registers
MC68HC912DT128A — Rev 4.0 Technical Data
MOTOROLA Bus Control and Input/Output 111
CALE — Calibration Reference Enable
Read and write anytime.
0 = Calibration reference is disabled and PE7 is general purpose
I/O in single chip or peripheral modes or if NDBE bit is set.
1 = Calibration reference is enabled on PE7 in single chip and
peripheral modes or if NDBE bit is set.
DBENE — DBE
or Inverted E Clock on PE7
Normal modes: write once. Special modes: write anytime EXCEPT
the first time. Read anytime.
DBENE controls which signal is output on PE7 when NDBE control bit
is cleared. The inverted E clock output can be used to latch the
address for de-multiplexing. It has the same behavior as the E clock,
except it is inverted. Please note that in the case of idle expansion
bus, the ‘not E clock’ signal could stay high for many cycles.
The DBENE bit has no effect in Single Chip or Peripheral Modes and
PE7 is defaulted to the CAL function if CALE bit is set in PEAR
register or to an I/O otherwise.
0 = PE7 pin used for DBE
external control of data enable on
memories in expanded modes when NDBE = 0
1 = PE7 pin used for inverted E clock output in expanded modes
when NDBE = 0
These bits select pull-up resistors for any pin in the corresponding
port that is currently configured as an input. This register is not in the
map in peripheral mode.
Read and write anytime.
PUPK — Pull-Up Port K Enable
0 = Port K pull-ups are disabled.
1 = Enable pull-up devices for all port K input pins.
PUCR — Pull-Up Control Register $000C
Bit 7654321Bit 0
PUPK PUPJ PUPH PUPE 0 0 PUPB PUPA
RESET: 00010000
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
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