Datasheet

Clock Functions
System Clock Frequency Formulae
MC68HC912DT128A — Rev 4.0 Technical Data
MOTOROLA Clock Functions 181
12.7 System Clock Frequency Formulae
See Figure 12-6:
SLWCLK = EXTALi / ( 2 x SLOW ) SLOW = 1,2,..63
SLWCLK = EXTALi SLOW = 0
PLLCLK = 2 x EXTALi x (SYNR + 1) / (REFDV + 1)
ECLK = SYSCLK / 2
XCLK = SLWCLK / 2
PCLK = SYSCLK / 2
BCLK
(1)
= EXTALi / 2
Boolean equations:
SYSCLK = (BCSP & PLLCLK) | (BCSP
& BCSS & EXTALi) | (BCSP &
BCSS & SLWCLK)
MCLK = (PCLK & MCS
) | (XCLK & MCS)
MSCAN system = (EXTALi & CLKSRC)
| (SYSCLK & CLKSRC)
BDM system = (BCLK & CLKSW)
| (ECLK & CLKSW)
NOTE: During limp-home mode PCLK, ECLK, BCLK, MCLK and XCLK are
supplied by VCO (PLLCLK).
1. If SYSCLK is slower than EXTALi (BCSS=1, BCSP=0, SLOW>0), BCLK becomes ECLK.
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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